Today’s VLSI + AI Jobs

10 fresh roles posted daily at 8 AM IST • Curated for chip design & verification engineers

Analog/Mixed-Signal IC Design Engineer — New College Graduate Hire (Omni Design Technologies)
✅ Fresher FriendlyRTL Design
📍 Milpitas, CA, USA
🎓 0–2 Years (Fresher)
💼 Full-time
💰 $85K–100K/yr
Analog IC Design Mixed-Signal Circuits ADC/DAC Cadence
Silicon Photonics Switch Architect (Qpisemi)
Photonics
📍 Bengaluru, India
🎓 6–10 Years
💼 Full-time
💰 ₹35–55 LPA
Silicon Photonics Optical Switching PIC Design Co-Packaged Optics
FPGA Silicon Design Engineer (Altera)
FPGA
📍 Bengaluru, India
🎓 4–8 Years
💼 Full-time
💰 ₹20–32 LPA
FPGA Custom IC Design ASIC Verification Logic Design
Staff Engineer, Design Verification Engineering (Analog Devices)
Verification
📍 Bengaluru, India
🎓 8–12 Years
💼 Full-time
💰 ₹30–45 LPA
SystemVerilog UVM Digital Design Verification Formal Verification
DFT Engineer (MediaTek)
DFT
📍 Bengaluru, India
🎓 6–12 Years
💼 Full-time
💰 ₹25–40 LPA
DFT ATPG STA Logic Equivalence Check
Digital Design Engineer — AI Accelerators (STMicroelectronics)
AI Silicon
📍 Greater Noida, India
🎓 3–6 Years
💼 Full-time
💰 ₹15–25 LPA
RTL Design Verilog AI Accelerator Architecture SystemVerilog
IO/Analog Layout Engineer (STMicroelectronics)
Physical Design
📍 Noida, India
🎓 1–3 Years
💼 Full-time
💰 ₹6–12 LPA
Layout Design Analog IC IO Cells Cadence Virtuoso
Product Design Engineering Intern — iPhone (Apple)
✅ Fresher FriendlySoC Architecture
📍 Bengaluru, India
🎓 Internship
💼 Internship
💰 Competitive
Hardware Design CAD Product Development DFM
SoC Power Validation Engineer (Apple)
SoC Architecture
📍 Herzliya, Israel
🎓 5–9 Years
💼 Full-time
💰 Competitive
Power Validation SoC Hardware Python C Lab Bring-up
Physical Design and Timing Engineer Intern — Summer 2027 (NVIDIA)
✅ Fresher FriendlyPhysical Design
📍 Santa Clara, CA, USA
🎓 Internship
💼 Internship
💰 Competitive
RTL to GDSII Physical Design EDA Tools Python STA
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