Today’s VLSI + AI Jobs

10 fresh roles posted daily at 8 AM IST • Curated for chip design & verification engineers

Senior AI Silicon Infrastructure Engineer (Microsoft)
AI Silicon
📍 India
🎓 Experienced (see posting)
💼 Full-time
💰 Competitive
Design Verification DFT Emulation PD Handoff IP Integration
Product Engineer — AI-Driven Analog Chip Design (Siemens EDA)
EDA Tools
📍 India
🎓 Experienced (see posting)
💼 Full-time
💰 Competitive
Analog Chip Design EDA AI/ML Circuit Simulation
Staff Engineer, ASIC Gen AI (Micron)
EDA Tools
📍 India
🎓 4+ Years
💼 Full-time
💰 Competitive
ASIC Generative AI Python Semiconductor Design Automation
Lead Performance Modeling Engineer — GPU SoC (AMD)
AI Silicon
📍 India
🎓 Experienced (see posting)
💼 Full-time
💰 Competitive
Performance Modeling GPU Architecture SoC C++
Analog Circuit Design Engineer (Altera)
FPGA
📍 India
🎓 Experienced (see posting)
💼 Full-time
💰 Competitive
Analog Circuit Design Mixed-Signal IP Advanced Process Nodes
ASIC Engineer — Physical Design (Cisco)
Physical Design
📍 Hyderabad, India
🎓 Mid-Senior Level
💼 Full-time
💰 Competitive
ASIC Physical Design Floorplanning P&R STA
Memory Circuit Design Engineer (Qualcomm)
SoC Architecture
📍 Bengaluru, India
🎓 Experienced (see posting)
💼 Full-time
💰 Competitive
Memory Circuit Design SRAM Custom Layout SPICE
NVIDIA 2027 Internship — Hardware Physical Design / VLSI
✅ Fresher FriendlyPhysical Design
📍 USA
🎓 Internship
💼 Internship
💰 Competitive
Physical Design VLSI Digital Design EDA Tools
Associate Engineer Intern, System Design Verification (Sandisk)
✅ Fresher FriendlyVerification
📍 Bengaluru, India
🎓 Internship
💼 Internship
💰 Competitive
Digital Electronics SystemVerilog Verification Memory Systems
Physical Design Applications Engineering Engineer (Synopsys)
✅ Fresher FriendlyPhysical Design
📍 India
🎓 0–2 Years (Fresher)
💼 Full-time
💰 Competitive
RTL2GDS PnR Tools CMOS Fundamentals Digital Circuits ASIC Design
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