Today’s VLSI + AI Jobs
10 fresh roles posted daily at 8 AM IST • Curated for chip design & verification engineers
VLSI Physical Design Engineer — Fresher (Multiple Companies via LinkedIn)
✅ Fresher FriendlyPhysical Design
Floorplanning CTS Timing Closure Physical Verification
VLSI RTL Design / FPGA Prototyping Intern (Multiple Companies via LinkedIn)
✅ Fresher FriendlyRTL Design
Verilog Xilinx FPGA Synthesis RTL Coding
VLSI Design Verification Engineer — Fresher (Multiple Companies via LinkedIn)
✅ Fresher FriendlyVerification
Verilog SystemVerilog Digital Electronics RTL Basics
Senior Design Verification Engineer (Excel VLSI Technologies)
Verification
ASIC/IP/SoC Verification SystemVerilog UVM Formal Verification
DFT Engineer (Qualcomm)
DFT
DFT Implementation Team Leadership Scan ATPG BIST
SoC Physical Design Engineer, PnR (Apple)
Physical Design
Physical Implementation Netlist to Tapeout Place and Route STA
DFT Design Engineer (AMD)
DFT
DFT Scan Insertion ATPG BIST VLSI Test Architecture
Senior Verification Engineer — ARM Fabric Unit Level (NVIDIA)
Verification
ARM Architecture SystemVerilog UVM Protocol Verification
ASIC Physical Design Engineer (NVIDIA)
Physical Design
Synthesis Floorplanning Formal Check GDSII Timing Closure
Senior ASIC Design Engineer — Agentic AI (NVIDIA)
AI Silicon
Verilog Micro-architecture RTL Development AI Accelerators